120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs

Yasuyuki Suzuki; Zin Yamazaki; Yasushi Amamiya; Shigeki Wada; Hiroaki Uchida; Chiharu Kurioka; Shinichi Tanaka; Hikaru Hida

doi:10.1109/JSSC.2004.835647

120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs

Yasuyuki Suzuki, Zin Yamazaki, Yasushi Amamiya, Shigeki Wada, Hiroaki Uchida, Chiharu Kurioka, Shinichi Tanaka, Hikaru Hida

Research output: Contribution to journal › Article › peer-review

51 Citations (Scopus)

Abstract

InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mV_pp, and the output swing is more than 400 mV _pp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.

Original language	English
Pages (from-to)	2397-2402
Number of pages	6
Journal	IEEE Journal of Solid-State Circuits
Volume	39
Issue number	12
DOIs	https://doi.org/10.1109/JSSC.2004.835647
Publication status	Published - 2004 Dec
Externally published	Yes

Keywords

Demultiplexing
Error-free operation
Flip-flop
Impedance matching
InP HBT
Multiplexing
Optical transmission system
Selector

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/JSSC.2004.835647

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title = "120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs",

abstract = "InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mVpp, and the output swing is more than 400 mV pp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.",

keywords = "Demultiplexing, Error-free operation, Flip-flop, Impedance matching, InP HBT, Multiplexing, Optical transmission system, Selector",

author = "Yasuyuki Suzuki and Zin Yamazaki and Yasushi Amamiya and Shigeki Wada and Hiroaki Uchida and Chiharu Kurioka and Shinichi Tanaka and Hikaru Hida",

note = "Funding Information: Manuscript received April 16, 2004; revised July 14, 2004. This work was supported in part by the National Institute of Information and Communications Technology of Japan. Y. Suzuki, Z. Yamazaki, Y. Amamiya, S. Wada, S. Tanaka, and H. Hida are with the System Devices Research Laboratories, NEC Corporation, Ibaraki 305-8501, Japan (e-mail: y-suzuki@ed.jp.nec.com). H. Uchida and C. Kurioka are with NEC Engineering, Ltd., Kanagawa 211-8666, Japan. Digital Object Identifier 10.1109/JSSC.2004.835647",

year = "2004",

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doi = "10.1109/JSSC.2004.835647",

language = "English",

volume = "39",

pages = "2397--2402",

journal = "IEEE Journal of Solid-State Circuits",

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AU - Suzuki, Yasuyuki

AU - Yamazaki, Zin

AU - Amamiya, Yasushi

AU - Wada, Shigeki

AU - Uchida, Hiroaki

AU - Kurioka, Chiharu

AU - Tanaka, Shinichi

AU - Hida, Hikaru

N1 - Funding Information: Manuscript received April 16, 2004; revised July 14, 2004. This work was supported in part by the National Institute of Information and Communications Technology of Japan. Y. Suzuki, Z. Yamazaki, Y. Amamiya, S. Wada, S. Tanaka, and H. Hida are with the System Devices Research Laboratories, NEC Corporation, Ibaraki 305-8501, Japan (e-mail: y-suzuki@ed.jp.nec.com). H. Uchida and C. Kurioka are with NEC Engineering, Ltd., Kanagawa 211-8666, Japan. Digital Object Identifier 10.1109/JSSC.2004.835647

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N2 - InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mVpp, and the output swing is more than 400 mV pp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.

AB - InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mVpp, and the output swing is more than 400 mV pp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.

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KW - Error-free operation

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KW - Impedance matching

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KW - Multiplexing

KW - Optical transmission system

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120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs

Abstract

Keywords

ASJC Scopus subject areas

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