A High-Speed Frequency Divider Using n+ -Ge Gate AlGaAs/GaAs MISFET's

Shuichi Fujita; Makoto Hirano; Koichi Maezawa; Takashi Mizutani

doi:10.1109/EDL.1987.26611

A High-Speed Frequency Divider Using n⁺ -Ge Gate AlGaAs/GaAs MISFET's

Shuichi Fujita, Makoto Hirano, Koichi Maezawa, Takashi Mizutani

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

A high-speed divide-by-four static frequency divider is fabricated using n⁺-Ge gate AlGaAs/GaAs heterostructure MISFET's. The divider circuit consists of two master-slave T-type flip-flops (T-FF's) and an output buffer based on source-coupled FET logic (SCFL). A maximum toggle frequency of 11.3 GHz with a power dissipation of 219 mW per T-F/F is obtained at 300 K using 1.0-μm gate FET's.

Original language	English
Pages (from-to)	226-227
Number of pages	2
Journal	IEEE Electron Device Letters
Volume	8
Issue number	5
DOIs	https://doi.org/10.1109/EDL.1987.26611
Publication status	Published - 1987 May
Externally published	Yes

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/EDL.1987.26611

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abstract = "A high-speed divide-by-four static frequency divider is fabricated using n+-Ge gate AlGaAs/GaAs heterostructure MISFET's. The divider circuit consists of two master-slave T-type flip-flops (T-FF's) and an output buffer based on source-coupled FET logic (SCFL). A maximum toggle frequency of 11.3 GHz with a power dissipation of 219 mW per T-F/F is obtained at 300 K using 1.0-μm gate FET's.",

author = "Shuichi Fujita and Makoto Hirano and Koichi Maezawa and Takashi Mizutani",

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doi = "10.1109/EDL.1987.26611",

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AU - Fujita, Shuichi

AU - Hirano, Makoto

AU - Maezawa, Koichi

AU - Mizutani, Takashi

PY - 1987/5

Y1 - 1987/5

N2 - A high-speed divide-by-four static frequency divider is fabricated using n+-Ge gate AlGaAs/GaAs heterostructure MISFET's. The divider circuit consists of two master-slave T-type flip-flops (T-FF's) and an output buffer based on source-coupled FET logic (SCFL). A maximum toggle frequency of 11.3 GHz with a power dissipation of 219 mW per T-F/F is obtained at 300 K using 1.0-μm gate FET's.

AB - A high-speed divide-by-four static frequency divider is fabricated using n+-Ge gate AlGaAs/GaAs heterostructure MISFET's. The divider circuit consists of two master-slave T-type flip-flops (T-FF's) and an output buffer based on source-coupled FET logic (SCFL). A maximum toggle frequency of 11.3 GHz with a power dissipation of 219 mW per T-F/F is obtained at 300 K using 1.0-μm gate FET's.

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JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 5

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A High-Speed Frequency Divider Using n⁺ -Ge Gate AlGaAs/GaAs MISFET's

Abstract

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