A leakage current monitor circuit using silicon on thin BOX MOSFET for dynamic back gate bias control

Hayate Okuhara, Kimiyoshi Usami, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A leakage current monitor circuit was developed for dynamic back gate bias control of CMOS LSI with Silicon on Thin BOX (SOTB) technology. By using the SOTB technology, sensors or wearable devices can suppress the leakage power by giving deep reverse body bias when they are not used. Once an event occurs, they must turn to the operational mode by changing the body bias quickly. According to the real chip evaluation, it takes hundreds of micro seconds, and the wake-up time is difficult to be estimated. The proposed detector using a leakage current monitor circuit guarantees that the target module is ready to be operational. The target body bias voltage for operation can be controlled by the bias voltage of the detector domain, which is computed with an expression in advance. SPICE simulation reveals that formulation is done and power overhead is only 42.7-42.9nW in the room temperature. Compensation equations for various temperatures are also shown.

Original languageEnglish
Title of host publicationIEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467373258
DOIs
Publication statusPublished - 2015 Jul 14
Event18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015 - Yokohama, Japan
Duration: 2015 Apr 132015 Apr 15

Publication series

NameIEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings

Other

Other18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015
Country/TerritoryJapan
CityYokohama
Period15/4/1315/4/15

Keywords

  • Dynamic Back Gate Bias Scaling
  • Leakage Monitor
  • SOTB MOSFET

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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