Abstract
Automatic road obstacle detection is one of the significant problem in Intelligent Transport Systems (ITS). Many studies have been conducted for this interesting problem by using on-vehicle cameras. However, those methods still needs a dozens of milliseconds for image processing. To develop the quick obstacle avoidance devices for vehicles, further computational time reduction is expected. Furthermore, regarding the applications, compact hardware is also expected for implementation. Thus, we study on computational time reduction of the road obstacle detection by using a small-type parallel image processor. Here, computational time is reduced by developing an obstacle detection algorithm which is appropriated to parallel processing concept of that hardware. According to the experimental evaluation of the new proposal, we could limit computational time for eleven milliseconds with a good obstacle detection performance.
| Original language | English |
|---|---|
| Pages (from-to) | 849-855 |
| Number of pages | 7 |
| Journal | Journal of Advanced Computational Intelligence and Intelligent Informatics |
| Volume | 18 |
| Issue number | 5 |
| DOIs | |
| Publication status | Published - 2014 Sept 1 |
| Externally published | Yes |
Keywords
- Computational time reduction
- Discriminant analysis
- Image sample variance
- Obstacle detection
- Parallel image processor
ASJC Scopus subject areas
- Human-Computer Interaction
- Computer Vision and Pattern Recognition
- Artificial Intelligence