Design of a 32-bit Microprocessor, TX1

Takeji Tokumaru; Eiji Masuda; Kimiyoshi Usami; Misao Miyata; Jun Iwamura; Chikahiro Hori

doi:10.1109/4.34075

Design of a 32-bit Microprocessor, TX1

Takeji Tokumaru, Eiji Masuda, Kimiyoshi Usami, Misao Miyata, Jun Iwamura, Chikahiro Hori

Research output: Contribution to journal › Article › peer-review

Abstract

This paper describes implementation of a VLSI microproces sor, the TX1, and especially focuses on the design method, which meets the requirements of short design time with reasonable chip size. A one-phase clock system, which is a better solution for high-speed operation but requires careful design for evading the skew problem, is discussed. Design for testability embedded in the chip is also described. The TX1 is fabricated with a 1.0-μm two-laver metal CMOS process. The chip contains 450K transistors in a 10.89× 10.27-mm² die.

Original language	English
Pages (from-to)	938-944
Number of pages	7
Journal	IEEE Journal of Solid-State Circuits
Volume	24
Issue number	4
DOIs	https://doi.org/10.1109/4.34075
Publication status	Published - 1989 Aug
Externally published	Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/4.34075

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@article{54ed3ddf81cb4c42b3b880327611e78d,

title = "Design of a 32-bit Microprocessor, TX1",

abstract = "This paper describes implementation of a VLSI microproces sor, the TX1, and especially focuses on the design method, which meets the requirements of short design time with reasonable chip size. A one-phase clock system, which is a better solution for high-speed operation but requires careful design for evading the skew problem, is discussed. Design for testability embedded in the chip is also described. The TX1 is fabricated with a 1.0-μm two-laver metal CMOS process. The chip contains 450K transistors in a 10.89× 10.27-mm2 die.",

author = "Takeji Tokumaru and Eiji Masuda and Kimiyoshi Usami and Misao Miyata and Jun Iwamura and Chikahiro Hori",

year = "1989",

month = aug,

doi = "10.1109/4.34075",

language = "English",

volume = "24",

pages = "938--944",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "4",

}

TY - JOUR

T1 - Design of a 32-bit Microprocessor, TX1

AU - Tokumaru, Takeji

AU - Masuda, Eiji

AU - Usami, Kimiyoshi

AU - Miyata, Misao

AU - Iwamura, Jun

AU - Hori, Chikahiro

PY - 1989/8

Y1 - 1989/8

N2 - This paper describes implementation of a VLSI microproces sor, the TX1, and especially focuses on the design method, which meets the requirements of short design time with reasonable chip size. A one-phase clock system, which is a better solution for high-speed operation but requires careful design for evading the skew problem, is discussed. Design for testability embedded in the chip is also described. The TX1 is fabricated with a 1.0-μm two-laver metal CMOS process. The chip contains 450K transistors in a 10.89× 10.27-mm2 die.

AB - This paper describes implementation of a VLSI microproces sor, the TX1, and especially focuses on the design method, which meets the requirements of short design time with reasonable chip size. A one-phase clock system, which is a better solution for high-speed operation but requires careful design for evading the skew problem, is discussed. Design for testability embedded in the chip is also described. The TX1 is fabricated with a 1.0-μm two-laver metal CMOS process. The chip contains 450K transistors in a 10.89× 10.27-mm2 die.

UR - http://www.scopus.com/inward/record.url?scp=0024717907&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0024717907&partnerID=8YFLogxK

U2 - 10.1109/4.34075

DO - 10.1109/4.34075

M3 - Article

AN - SCOPUS:0024717907

SN - 0018-9200

VL - 24

SP - 938

EP - 944

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 4

ER -

Design of a 32-bit Microprocessor, TX1

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