Design Optimization of Wiring Substrate for a CMOS-Based Multichip Module,

T.Sudo T.Sudo, N.Hirano N.Hirano, K.Kato K.Kato, Y.Hiruta Y.Hiruta, Y.Fuchida Y.Fuchida, Toshio Sudo

Research output: Contribution to journal › Article › peer-review

Cite this

@article{569e43ecd13d4951a28362107b168a71,

title = "Design Optimization of Wiring Substrate for a CMOS-Based Multichip Module,",

author = "T.Sudo T.Sudo and N.Hirano N.Hirano and K.Kato K.Kato and Y.Hiruta Y.Hiruta and Y.Fuchida Y.Fuchida and Toshio Sudo",

year = "1992",

month = may,

day = "25",

language = "English",

pages = "710--716",

journal = "ECTC",

}