Evaluation of power supply noise reduction by implementing on-chip capacitance

Hideyuki Fujii; Yoshinori Kobayashi; Toshio Sudo

Evaluation of power supply noise reduction by implementing on-chip capacitance

Hideyuki Fujii, Yoshinori Kobayashi, Toshio Sudo

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

On-chip decoupling capacitor works to reduce on-chip power supply fluctuation by localizing switching current inside chip. This results in the reduction of electromagnetic interference (EMI) by preventing switching current with high frequency components flowing out from the chip. In this paper, a test chip with on-chip decoupling capacitance and noise generating circuits has been reported using CMOS 0.18 m process. Shoot-through current generator was designed to excite impulse type noise generation. Effects of on-chip capacitance on noise reduction ware evaluated by measuring the test chip as well as by using power supply noise analysis tool. Power supply noise reduction has been quantitatively evaluated by both experiment and analysis.

Original language	English
Title of host publication	Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011
Pages	219-223
Number of pages	5
Publication status	Published - 2011
Externally published	Yes
Event	8th International Workshop on Electromagnetic Compatibility of Integrated Circuits, EMC COMPO 2011 - Dubrovnik, Croatia Duration: 2011 Nov 6 → 2011 Nov 9

Publication series

Name	Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011

Conference

Conference	8th International Workshop on Electromagnetic Compatibility of Integrated Circuits, EMC COMPO 2011
Country/Territory	Croatia
City	Dubrovnik
Period	11/11/6 → 11/11/9

Keywords

CMOS test chips
on-chip capacitance
power supply noise
shoot-through current generator

ASJC Scopus subject areas

Hardware and Architecture

Cite this

Fujii, H., Kobayashi, Y., & Sudo, T. (2011). Evaluation of power supply noise reduction by implementing on-chip capacitance. In Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011 (pp. 219-223). [6130067] (Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011).

Evaluation of power supply noise reduction by implementing on-chip capacitance. / Fujii, Hideyuki; Kobayashi, Yoshinori; Sudo, Toshio.

Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011. 2011. p. 219-223 6130067 (Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Fujii, H, Kobayashi, Y & Sudo, T 2011, Evaluation of power supply noise reduction by implementing on-chip capacitance. in Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011., 6130067, Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011, pp. 219-223, 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits, EMC COMPO 2011, Dubrovnik, Croatia, 11/11/6.

Fujii H, Kobayashi Y, Sudo T. Evaluation of power supply noise reduction by implementing on-chip capacitance. In Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011. 2011. p. 219-223. 6130067. (Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011).

Fujii, Hideyuki ; Kobayashi, Yoshinori ; Sudo, Toshio. / Evaluation of power supply noise reduction by implementing on-chip capacitance. Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011. 2011. pp. 219-223 (Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011).

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abstract = "On-chip decoupling capacitor works to reduce on-chip power supply fluctuation by localizing switching current inside chip. This results in the reduction of electromagnetic interference (EMI) by preventing switching current with high frequency components flowing out from the chip. In this paper, a test chip with on-chip decoupling capacitance and noise generating circuits has been reported using CMOS 0.18 m process. Shoot-through current generator was designed to excite impulse type noise generation. Effects of on-chip capacitance on noise reduction ware evaluated by measuring the test chip as well as by using power supply noise analysis tool. Power supply noise reduction has been quantitatively evaluated by both experiment and analysis.",

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AB - On-chip decoupling capacitor works to reduce on-chip power supply fluctuation by localizing switching current inside chip. This results in the reduction of electromagnetic interference (EMI) by preventing switching current with high frequency components flowing out from the chip. In this paper, a test chip with on-chip decoupling capacitance and noise generating circuits has been reported using CMOS 0.18 m process. Shoot-through current generator was designed to excite impulse type noise generation. Effects of on-chip capacitance on noise reduction ware evaluated by measuring the test chip as well as by using power supply noise analysis tool. Power supply noise reduction has been quantitatively evaluated by both experiment and analysis.

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KW - on-chip capacitance

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KW - shoot-through current generator

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Evaluation of power supply noise reduction by implementing on-chip capacitance

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

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