Interpolated digital sinusoidal oscillators

The digital sinusoidal oscillator considered in this paper is one of the signal sources employed in the digital signal processing system. A construction of the oscillator is discussed where the memory capacity is reduced and the increasing rate of the noise is suppressed by interpolating the output of the oscillator of table look‐up type or feedback type. A design method for the interpolation filter is presented first where no interpolation error is produced if the coefficient wordlength of the interpolation filter is infinite. Then, considering the case where the wordlength is kept finite, the hold‐type sampling expander is proposed where the waveform distortion is kept low compared with the traditional zero‐interpolation‐type sampling rate expander. The distortion in the proposed method is analyzed where the wordlength of the interpolation filter coefficient is kept finite, and the waveform distortion is shown to be low. The increasing rate of the round‐off error is examined by a computer simulation for the oscillator, which is obtained by applying the interpolation to the feedback‐type oscillator. The effectiveness of the interpolation is demonstrated. Finally, a construction of the block‐digital sinusoidal oscillator is shown with a smaller hardware complexity than in the traditional method, by constructing the block‐structured oscillator by realizing the proposed interpolation filter as a polyphase filter.