Numerical modeling of reduction in surface-related lags and current slump in GaAs FETs

F. Hafiz, M. Kumeno, T. Tanaka, K. Horio

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We perform a two-dimensional transient analysis of field-plate GaAs MESFETs in which surface states are considered. Quasi-pulsed current-voltage curves are derived from the transient characteristics. It is shown that drain lag and current slump due to surface states are reduced by introducing a field plate because fixed potential at the field plate leads to reducing trapping effects by the surface states. Dependence of lag phenomena and current slump on field-plate length and SiO2 passivation layer thickness is also studied, indicating that the lags and current slump can be completely removed in some cases.

Original languageEnglish
Title of host publication2013 IEEE International Conference of IEEE Region 10, IEEE TENCON 2013 - Conference Proceedings
DOIs
Publication statusPublished - 2013 Dec 1
Event2013 IEEE International Conference of IEEE Region 10, IEEE TENCON 2013 - Xi'an, Shaanxi, China
Duration: 2013 Oct 222013 Oct 25

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON
ISSN (Print)2159-3442
ISSN (Electronic)2159-3450

Conference

Conference2013 IEEE International Conference of IEEE Region 10, IEEE TENCON 2013
Country/TerritoryChina
CityXi'an, Shaanxi
Period13/10/2213/10/25

Keywords

  • GaAs FET
  • current slump
  • drain lag
  • field plate
  • gate lag
  • surface state

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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