Numerical Simulation of GaAs MESFET’s with a p-Buffer Layer on the Semi-insulating Substrate Compensated by Deep Traps

K.Horio K.Horio, Y.Fuseya Y.Fuseya, H.Kusuki H.Kusuki, H.Yanai H.Yanai, Kazushige Horio

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	1371-1379
Journal	IEEE Trans.Microwave Theory Tech.
Volume	37
Publication status	Published - 1989 Sept 1

Cite this

@article{f3aae0695c9d48358ceb66cb8bd2022f,

title = "Numerical Simulation of GaAs MESFET{\textquoteright}s with a p-Buffer Layer on the Semi-insulating Substrate Compensated by Deep Traps",

author = "K.Horio K.Horio and Y.Fuseya Y.Fuseya and H.Kusuki H.Kusuki and H.Yanai H.Yanai and Kazushige Horio",

year = "1989",

month = sep,

day = "1",

language = "English",

volume = "37",

pages = "1371--1379",

journal = "IEEE Trans.Microwave Theory Tech.",

}

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T1 - Numerical Simulation of GaAs MESFET’s with a p-Buffer Layer on the Semi-insulating Substrate Compensated by Deep Traps

AU - K.Horio, K.Horio

AU - Y.Fuseya, Y.Fuseya

AU - H.Kusuki, H.Kusuki

AU - H.Yanai, H.Yanai

AU - Horio, Kazushige

PY - 1989/9/1

Y1 - 1989/9/1

M3 - Article

VL - 37

SP - 1371

EP - 1379

JO - IEEE Trans.Microwave Theory Tech.

JF - IEEE Trans.Microwave Theory Tech.

ER -