Abstract
At 13.56MHz, the inverter is strongly affected by parasitic elements. The print circuit board (PCB) design is very critical because it control the parasitic elements on the circuit. This paper analyzes the effect of parasitic elements on switching performance of MOSFETs in 13.56MHz class D inverter. This work also proposes an improved PCB design which can provide a 23.4% decrease in parasitic inductance comparing with conventional PCB design.
Original language | English |
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Title of host publication | 9th International Conference on Power Electronics - ECCE Asia: "Green World with Power Electronics", ICPE 2015-ECCE Asia |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1692-1699 |
Number of pages | 8 |
ISBN (Print) | 9788957082546 |
DOIs | |
Publication status | Published - 2015 Jul 27 |
Event | 9th International Conference on Power Electronics - ECCE Asia, ICPE 2015-ECCE Asia - Seoul, Korea, Republic of Duration: 2015 Jun 1 → 2015 Jun 5 |
Other
Other | 9th International Conference on Power Electronics - ECCE Asia, ICPE 2015-ECCE Asia |
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Country/Territory | Korea, Republic of |
City | Seoul |
Period | 15/6/1 → 15/6/5 |
Keywords
- Class D inverter
- high frequency inverter
- PCB design
- Wireless power transfer
ASJC Scopus subject areas
- Energy Engineering and Power Technology
- Electrical and Electronic Engineering