TY - JOUR
T1 - Preparation and properties of Bi2SiO5/Si structures
AU - Yamaguchi, Masaki
AU - Hiraki, Kouji
AU - Nagatomo, Takao
AU - Masuda, Yoichiro
PY - 2000/9
Y1 - 2000/9
N2 - Bismuth silicate (Bi2SiO5) films, expected as the intermediate buffer layer between the bismuth layer-structured ferroelectrics (BLSF) and silicon substrate were prepared on (100)-oriented silicon wafers by rf magnetron sputtering. The c-axis-oriented Bi2SiO5 films with smooth surface morphology were obtained at the substrate temperature of 400°C. The leakage current density is on the order of 10-10 A·cm-2, under the applied electric field of less than 350 kV·cm-1. From capacitance-voltage characteristics measurement results, it is worth noting that hysteresis is hardly observed. The interface trap density at the midgap is estimated to be approximately 6 × 1012 cm-2·eV-1. The numerical evaluation results indicate that the metal-ferroelectric-insulator-semiconductor (MFIS) capacitor can be reversed at a low applied voltage. This suggests that Bi4Ti3O12/Bi2SiO5/Si structures are suitable for application for ferroelectric memory devices.
AB - Bismuth silicate (Bi2SiO5) films, expected as the intermediate buffer layer between the bismuth layer-structured ferroelectrics (BLSF) and silicon substrate were prepared on (100)-oriented silicon wafers by rf magnetron sputtering. The c-axis-oriented Bi2SiO5 films with smooth surface morphology were obtained at the substrate temperature of 400°C. The leakage current density is on the order of 10-10 A·cm-2, under the applied electric field of less than 350 kV·cm-1. From capacitance-voltage characteristics measurement results, it is worth noting that hysteresis is hardly observed. The interface trap density at the midgap is estimated to be approximately 6 × 1012 cm-2·eV-1. The numerical evaluation results indicate that the metal-ferroelectric-insulator-semiconductor (MFIS) capacitor can be reversed at a low applied voltage. This suggests that Bi4Ti3O12/Bi2SiO5/Si structures are suitable for application for ferroelectric memory devices.
UR - http://www.scopus.com/inward/record.url?scp=0034262635&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0034262635&partnerID=8YFLogxK
U2 - 10.1143/jjap.39.5512
DO - 10.1143/jjap.39.5512
M3 - Article
AN - SCOPUS:0034262635
SN - 0021-4922
VL - 39
SP - 5512
EP - 5516
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
IS - 9 B
ER -