TY - GEN
T1 - Thermal Transient Analysis and Dynamic Temperature Control Algorithm for 3-D Stacked Chips
AU - Wang, Songxiang
AU - Usami, Kimiyoshi
N1 - Funding Information:
ACKNOWLEDGMENT This work was supported by SIT International Research Center for Green Electronics.
Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - 3D-LSI is a promising technology to increase transistor density as device scaling becomes more difficult. It also enables us to reduce power consumption and improve performance through wire length reduction. However, 3D-LSI has more serious thermal problems than non-stacked chips. Therefore, thermal management is necessary to maintain the temperature at the normal level in 3D-LSI. In this paper, we focus on the factor of 'ease of temperature rise' that varies depending on the position inside the 3D-LSI and propose an approach to incorporate this factor as the 'Position Weight' into the thermal management algorithm. Tasks are migrated from one processing element (PE) to another PE by considering both position weight and the temperature so as to suppress the maximum temperature. Using this approach, we developed an algorithm to suppress the maximum temperature inside the chip without changing the total amount of heat generated. Simulation verification was conducted using a commercial thermal analysis software. Results showed that our approach enabled us to reduce the maximum temperature in the chip by more than 15°C over the conventional techniques, while maintaining the performance.
AB - 3D-LSI is a promising technology to increase transistor density as device scaling becomes more difficult. It also enables us to reduce power consumption and improve performance through wire length reduction. However, 3D-LSI has more serious thermal problems than non-stacked chips. Therefore, thermal management is necessary to maintain the temperature at the normal level in 3D-LSI. In this paper, we focus on the factor of 'ease of temperature rise' that varies depending on the position inside the 3D-LSI and propose an approach to incorporate this factor as the 'Position Weight' into the thermal management algorithm. Tasks are migrated from one processing element (PE) to another PE by considering both position weight and the temperature so as to suppress the maximum temperature. Using this approach, we developed an algorithm to suppress the maximum temperature inside the chip without changing the total amount of heat generated. Simulation verification was conducted using a commercial thermal analysis software. Results showed that our approach enabled us to reduce the maximum temperature in the chip by more than 15°C over the conventional techniques, while maintaining the performance.
KW - 3D-LSI
KW - Dynamic Temperature Control
KW - Task Migration
KW - Thermal Management
UR - http://www.scopus.com/inward/record.url?scp=85140616401&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85140616401&partnerID=8YFLogxK
U2 - 10.1109/ITC-CSCC55581.2022.9895062
DO - 10.1109/ITC-CSCC55581.2022.9895062
M3 - Conference contribution
AN - SCOPUS:85140616401
T3 - ITC-CSCC 2022 - 37th International Technical Conference on Circuits/Systems, Computers and Communications
SP - 614
EP - 617
BT - ITC-CSCC 2022 - 37th International Technical Conference on Circuits/Systems, Computers and Communications
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 37th International Technical Conference on Circuits/Systems, Computers and Communications, ITC-CSCC 2022
Y2 - 5 July 2022 through 8 July 2022
ER -