1.5-V Low Supply Voltage 43-Gb/s Delayed Flip Flop Circuit

Y. Amamiya, Y. AmamiyaY.SuzukiZ.YamazakiA.Fujihara S.Tanaka, H.Hida H.Hida, Shinichi Tanaka

研究成果: Article › 査読

本文言語	English
ページ（範囲）	169-172
ジャーナル	MTT-S International Microwave Symposium (2003)
出版ステータス	Published - 2003 1月 1

引用スタイル

@article{96e3978dfb3740e19fede19ea6763b1d,

title = "1.5-V Low Supply Voltage 43-Gb/s Delayed Flip Flop Circuit",

author = "Y. Amamiya and S.Tanaka, {Y. AmamiyaY.SuzukiZ.YamazakiA.Fujihara} and H.Hida H.Hida and Shinichi Tanaka",

year = "2003",

month = jan,

day = "1",

language = "English",

pages = "169--172",

journal = "MTT-S International Microwave Symposium (2003)",

}