TY - JOUR
T1 - A low-IF/Zero-IF reconfigurable analog baseband ic with an I/Q imbalance cancellation scheme
AU - Kitsunezuka, Masaki
AU - Tokairin, Takashi
AU - Maeda, Tadashi
AU - Fukaishi, Muneo
PY - 2011/3
Y1 - 2011/3
N2 - A low-IF/zero-IF reconfigurable analog baseband IC embodying an automatic I/Q imbalance cancellation scheme is reported. The chip, which comprises a down-conversion mixer, an analog baseband filter, and a programmable gain amplifier, achieves a high image rejection of 55 dB without any calibration. It operates over a wide radio frequency range of 0.42.4 GHz, and has a cut-off frequency range of 0.330 MHz in zero-intermediate frequency (IF) mode and an IF range of 0.26 MHz in low-IF mode. The circuit in the receiver chain draws only 4.56.2 mA, and the clock generator including LO buffers draws 1.86.3 mA from a 1.2-V supply. The chip, implemented in 90-nm CMOS technology, occupies an area of 1.1 mm2.
AB - A low-IF/zero-IF reconfigurable analog baseband IC embodying an automatic I/Q imbalance cancellation scheme is reported. The chip, which comprises a down-conversion mixer, an analog baseband filter, and a programmable gain amplifier, achieves a high image rejection of 55 dB without any calibration. It operates over a wide radio frequency range of 0.42.4 GHz, and has a cut-off frequency range of 0.330 MHz in zero-intermediate frequency (IF) mode and an IF range of 0.26 MHz in low-IF mode. The circuit in the receiver chain draws only 4.56.2 mA, and the clock generator including LO buffers draws 1.86.3 mA from a 1.2-V supply. The chip, implemented in 90-nm CMOS technology, occupies an area of 1.1 mm2.
KW - Analog baseband
KW - duty-cycle control
KW - dynamic matching
KW - image rejection
KW - low-IF
KW - reconfigurable filter
KW - software-defined radio
KW - zero-IF
UR - http://www.scopus.com/inward/record.url?scp=79952068916&partnerID=8YFLogxK
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U2 - 10.1109/JSSC.2010.2102510
DO - 10.1109/JSSC.2010.2102510
M3 - Article
AN - SCOPUS:79952068916
SN - 0018-9200
VL - 46
SP - 572
EP - 582
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 3
M1 - 5708186
ER -