TY - GEN
T1 - A Non-Volatile Flip-Flop Circuit Using One MTJ and Reference Resistance
AU - Kaizu, Kousei
AU - Usami, Kimiyoshi
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - Non-Volatile Flip Flops (NVFF) using Magnetic Tunnel Junction (MTJ) enable non-volatile power gating and reduce leakage power. However, MTJ has a problem of high write energy. Conventional NVFFs write to two MTJs per NVFF because they read using the difference between the high and low resistance of the MTJs. However, it is not necessary to write to two MTJs, if they can be accurately read using one MTJ and a reference resistor whose resistance value is fixed between high and low resistance. In this study, we propose an NVFF circuit that has a reference resistor and writes to only one MTJ to reduce energy. We conducted circuit design and layout in the 65nm process technology. Simulation results demonstrated that the write energy was reduced by 58% while suppressing the area overhead to 5%.
AB - Non-Volatile Flip Flops (NVFF) using Magnetic Tunnel Junction (MTJ) enable non-volatile power gating and reduce leakage power. However, MTJ has a problem of high write energy. Conventional NVFFs write to two MTJs per NVFF because they read using the difference between the high and low resistance of the MTJs. However, it is not necessary to write to two MTJs, if they can be accurately read using one MTJ and a reference resistor whose resistance value is fixed between high and low resistance. In this study, we propose an NVFF circuit that has a reference resistor and writes to only one MTJ to reduce energy. We conducted circuit design and layout in the 65nm process technology. Simulation results demonstrated that the write energy was reduced by 58% while suppressing the area overhead to 5%.
KW - Magnetic Tunnel Junction
KW - Non-volatile flip-flops
KW - Power Gating
UR - https://www.scopus.com/pages/publications/85203586463
UR - https://www.scopus.com/inward/citedby.url?scp=85203586463&partnerID=8YFLogxK
U2 - 10.1109/ITC-CSCC62988.2024.10628353
DO - 10.1109/ITC-CSCC62988.2024.10628353
M3 - Conference contribution
AN - SCOPUS:85203586463
T3 - 2024 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2024
BT - 2024 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2024 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2024
Y2 - 2 July 2024 through 5 July 2024
ER -