TY - JOUR
T1 - A O.l-pm Self-Aligned-Gate GaAs MESFET with Multilayer Interconnection Structure for Ultra-High-speed ICs
AU - Tokumitsu, Masami
AU - Hirano, Makoto
AU - Otsuji, Taiichi
AU - Yamaguchi, Satoshi
AU - Yamasaki, Kimiyoshi
N1 - Publisher Copyright:
© 1996IEEE
PY - 1996
Y1 - 1996
N2 - We have developed the technologies to fabricate about 0.1-pm-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-pm-gate-length MESFET having current-gain cutoff frequency (fT) of 168 GHz. Using 0.13-pm-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.
AB - We have developed the technologies to fabricate about 0.1-pm-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-pm-gate-length MESFET having current-gain cutoff frequency (fT) of 168 GHz. Using 0.13-pm-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.
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U2 - 10.1109/IEDM.1996.553570
DO - 10.1109/IEDM.1996.553570
M3 - Conference article
AN - SCOPUS:0030393798
SN - 0163-1918
SP - 211
EP - 214
JO - Technical Digest - International Electron Devices Meeting, IEDM
JF - Technical Digest - International Electron Devices Meeting, IEDM
T2 - Proceedings of the 1996 IEEE International Electron Devices Meeting
Y2 - 8 December 1996 through 11 December 1996
ER -