Analysis of pulsed I-V curves and power slump in gaas and gan fets

Y. Kazami; D. Kasai; K. Yonemoto; K. Horio

Analysis of pulsed I-V curves and power slump in gaas and gan fets

Y. Kazami, D. Kasai, K. Yonemoto, K. Horio

研究成果: Paper › 査読

抄録

Turn-on characteristics of GaAs MESFETs are simulated in which substrate traps and surface states are considered. Quasi-pulsed I-V curves are derived from the turn-on characteristics, indicating that so-called power slump could occur both due to substrate traps and due to surface states. Transient simulations of GaN MESFETs are also performed in which deep levels in a semi-insulating buffer layer are considered. So-called drain lag is shown to arise as in GaAs MESFETs. It is also shown that the power slump in GaN MESFETs could occur due to deep levels in the semi-insulating buffer layer.

本文言語	English
ページ	46-53
ページ数	8
出版ステータス	Published - 2005 12月 1
イベント	20th Symposium on Microelectronics Technology and Devices, SBMicro 2005 - Florianopolis, Brazil 継続期間: 2005 9月 4 → 2005 9月 7

Conference

Conference	20th Symposium on Microelectronics Technology and Devices, SBMicro 2005
国/地域	Brazil
City	Florianopolis
Period	05/9/4 → 05/9/7

ASJC Scopus subject areas

工学（全般）

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abstract = "Turn-on characteristics of GaAs MESFETs are simulated in which substrate traps and surface states are considered. Quasi-pulsed I-V curves are derived from the turn-on characteristics, indicating that so-called power slump could occur both due to substrate traps and due to surface states. Transient simulations of GaN MESFETs are also performed in which deep levels in a semi-insulating buffer layer are considered. So-called drain lag is shown to arise as in GaAs MESFETs. It is also shown that the power slump in GaN MESFETs could occur due to deep levels in the semi-insulating buffer layer.",

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year = "2005",

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T1 - Analysis of pulsed I-V curves and power slump in gaas and gan fets

AU - Kazami, Y.

AU - Kasai, D.

AU - Yonemoto, K.

AU - Horio, K.

PY - 2005/12/1

Y1 - 2005/12/1

N2 - Turn-on characteristics of GaAs MESFETs are simulated in which substrate traps and surface states are considered. Quasi-pulsed I-V curves are derived from the turn-on characteristics, indicating that so-called power slump could occur both due to substrate traps and due to surface states. Transient simulations of GaN MESFETs are also performed in which deep levels in a semi-insulating buffer layer are considered. So-called drain lag is shown to arise as in GaAs MESFETs. It is also shown that the power slump in GaN MESFETs could occur due to deep levels in the semi-insulating buffer layer.

AB - Turn-on characteristics of GaAs MESFETs are simulated in which substrate traps and surface states are considered. Quasi-pulsed I-V curves are derived from the turn-on characteristics, indicating that so-called power slump could occur both due to substrate traps and due to surface states. Transient simulations of GaN MESFETs are also performed in which deep levels in a semi-insulating buffer layer are considered. So-called drain lag is shown to arise as in GaAs MESFETs. It is also shown that the power slump in GaN MESFETs could occur due to deep levels in the semi-insulating buffer layer.

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UR - http://www.scopus.com/inward/citedby.url?scp=31744450611&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:31744450611

SP - 46

EP - 53

T2 - 20th Symposium on Microelectronics Technology and Devices, SBMicro 2005

Y2 - 4 September 2005 through 7 September 2005

ER -

Analysis of pulsed I-V curves and power slump in gaas and gan fets

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Conference

ASJC Scopus subject areas

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