TY - GEN
T1 - Delamination analysis of stacked via in high-density multilayer printed wiring boards by FEA
AU - Nozaki, Moe
AU - Kariya, Yoshiharu
AU - Hiroshima, Yoshiyuki
AU - Taketomi, Nobuo
AU - Ohashi, Kenichi
AU - Tomioka, Kenichi
AU - Kikuchi, Shunichi
AU - Tan, Jack
N1 - Funding Information:
This work was supported by HDP User Group International, Inc.
Publisher Copyright:
© 2021 IEEE
PY - 2021/10/5
Y1 - 2021/10/5
N2 - The effects of structural factors on the delamination of the stacked via in high-density multilayer printed wiring boards were investigated by a statistical approach. Although reducing the height of via or the number of via stacks is effective to prevent the delamination, if these cannot be reduced, the risk of the delamination is eased by increasing the pitch of the stacked via.
AB - The effects of structural factors on the delamination of the stacked via in high-density multilayer printed wiring boards were investigated by a statistical approach. Although reducing the height of via or the number of via stacks is effective to prevent the delamination, if these cannot be reduced, the risk of the delamination is eased by increasing the pitch of the stacked via.
UR - http://www.scopus.com/inward/record.url?scp=85120434314&partnerID=8YFLogxK
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U2 - 10.1109/LTB-3D53950.2021.9598404
DO - 10.1109/LTB-3D53950.2021.9598404
M3 - Conference contribution
AN - SCOPUS:85120434314
T3 - 2021 7th International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2021
SP - 42
BT - 2021 7th International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 7th International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2021
Y2 - 5 October 2021 through 11 October 2021
ER -