Design Optimization of Wiring Substrate for a CMOS-Based Multichip Module

T. Sudo, N. Hirano, K. Kato, Y. Hiruta, Y. Fuchida

研究成果: Article › 査読

本文言語	English
ページ（範囲）	710-716
ジャーナル	ECTE(Electronic Components and Technology Conference)'92
出版ステータス	Published - 1992 5月 1

引用スタイル

@article{c2b42f950cef4098b2b61a8d15955d04,

title = "Design Optimization of Wiring Substrate for a CMOS-Based Multichip Module",

author = "T. Sudo and N. Hirano and K. Kato and Y. Hiruta and Y. Fuchida",

year = "1992",

month = may,

day = "1",

language = "English",

pages = "710--716",

journal = "ECTE(Electronic Components and Technology Conference)'92",

}