TY - GEN
T1 - Efficient leakage power saving by sleep depth controlling for multi-mode power gating
AU - Takeda, Seidai
AU - Miwa, Shinobu
AU - Usami, Kimiyoshi
AU - Nakamura, Hiroshi
PY - 2012
Y1 - 2012
N2 - Power Gating (PG) and Body Biasing (BB) are effective schemes to save leakage power in standby-time. However, in run-time, their large overhead energy and latency for sleep control prevent the circuit from saving power in short idle times. To reduce those overheads, advanced PG and BB using shallow sleep mode are studied. Those circuits achieve leakage saving even in short idle time. The depth of sleep mode has trade-offs between the overheads and the amount of saved leakage power; hence, making decision of depth of a shallow sleep is an important issue to maximize total leakage saving. However, the depth which achieves best leakage saving depends heavily on run-time factors, such as application behavior and temperature. Thus, the conventional circuit has multiple shallow sleep modes and chooses an adequate mode in run-time. However, it causes large overhead power because of additional voltage generators for shallow sleep modes. In this paper, we propose a sleep control scheme named Opt-static for run-time leakage saving. Our scheme uses only one shallow sleep mode, but its depth is reconfigurable. It successfully achieves leakage saving by adopting its depth with run-time factors. In addition, our scheme needs only one active voltage generator; hence overhead power associated with voltage generators is smaller than the conventional circuit which has multiple shallow sleep modes. Experimental results show that our schemes applied to Multi-mode PG achieves higher leakage saving than the conventional Multi-mode PG which has two shallow sleep modes, although it does not take into account for overhead power of voltage generators.
AB - Power Gating (PG) and Body Biasing (BB) are effective schemes to save leakage power in standby-time. However, in run-time, their large overhead energy and latency for sleep control prevent the circuit from saving power in short idle times. To reduce those overheads, advanced PG and BB using shallow sleep mode are studied. Those circuits achieve leakage saving even in short idle time. The depth of sleep mode has trade-offs between the overheads and the amount of saved leakage power; hence, making decision of depth of a shallow sleep is an important issue to maximize total leakage saving. However, the depth which achieves best leakage saving depends heavily on run-time factors, such as application behavior and temperature. Thus, the conventional circuit has multiple shallow sleep modes and chooses an adequate mode in run-time. However, it causes large overhead power because of additional voltage generators for shallow sleep modes. In this paper, we propose a sleep control scheme named Opt-static for run-time leakage saving. Our scheme uses only one shallow sleep mode, but its depth is reconfigurable. It successfully achieves leakage saving by adopting its depth with run-time factors. In addition, our scheme needs only one active voltage generator; hence overhead power associated with voltage generators is smaller than the conventional circuit which has multiple shallow sleep modes. Experimental results show that our schemes applied to Multi-mode PG achieves higher leakage saving than the conventional Multi-mode PG which has two shallow sleep modes, although it does not take into account for overhead power of voltage generators.
KW - Fine Grain Power Gating
KW - Leakage Power
KW - Wake Up Time
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U2 - 10.1109/ISQED.2012.6187558
DO - 10.1109/ISQED.2012.6187558
M3 - Conference contribution
AN - SCOPUS:84863650505
SN - 9781467310369
T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED
SP - 625
EP - 632
BT - Proceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012
T2 - 13th International Symposium on Quality Electronic Design, ISQED 2012
Y2 - 19 March 2012 through 21 March 2012
ER -