TY - GEN
T1 - Harnessing SMT-based bounded model checking through stateless explicit-state exploration
AU - Kong, Weiqiang
AU - Liu, Leyuan
AU - Ando, Takahiro
AU - Yatsu, Hirokazu
AU - Hisazumi, Kenji
AU - Fukuda, Akira
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2013
Y1 - 2013
N2 - We propose a hybrid approach to improving the verification performance of SMT-based bounded model checking for LTL properties. In this approach, stateless explicitstate exploration is utilized to traverse, under the constraints of bounded context switches, the state space of a system design and memorize legal execution paths. These paths are classified according to certain predicates into path clusters, which are then encoded into propositional formulas representing, together with the encoded formula for an LTL property, independent BMC instances. Such BMC instances are solved with SMT solvers running on mutilcores in parallel. Once a counterexample is found for one of the instances, the entire model checking terminates. This hybrid checking procedure progresses in an incremental fashion until either a counterexample is found or the user-specified bound is reached. We have implemented this proposed hybrid approach in a tool called Garakabu2 with CVC4 as its backend solver. The experimental results show that Garakabu2 often outperforms the state-of-the-art pure BMC methods implemented in SAL infinite bounded model checker for both safety and liveness properties.
AB - We propose a hybrid approach to improving the verification performance of SMT-based bounded model checking for LTL properties. In this approach, stateless explicitstate exploration is utilized to traverse, under the constraints of bounded context switches, the state space of a system design and memorize legal execution paths. These paths are classified according to certain predicates into path clusters, which are then encoded into propositional formulas representing, together with the encoded formula for an LTL property, independent BMC instances. Such BMC instances are solved with SMT solvers running on mutilcores in parallel. Once a counterexample is found for one of the instances, the entire model checking terminates. This hybrid checking procedure progresses in an incremental fashion until either a counterexample is found or the user-specified bound is reached. We have implemented this proposed hybrid approach in a tool called Garakabu2 with CVC4 as its backend solver. The experimental results show that Garakabu2 often outperforms the state-of-the-art pure BMC methods implemented in SAL infinite bounded model checker for both safety and liveness properties.
UR - http://www.scopus.com/inward/record.url?scp=84936853944&partnerID=8YFLogxK
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U2 - 10.1109/APSEC.2013.55
DO - 10.1109/APSEC.2013.55
M3 - Conference contribution
AN - SCOPUS:84936853944
SN - 9780769549224
T3 - Proceedings - Asia-Pacific Software Engineering Conference, APSEC
SP - 355
EP - 362
BT - APSEC 2013 - Proceedings of the 20th Asia-Pacific Software Engineering Conference
A2 - Muenchaisri, Pornsiri
A2 - Rothermel, Gregg
PB - IEEE Computer Society
T2 - 20th Asia-Pacific Software Engineering Conference, APSEC 2013
Y2 - 2 December 2013 through 5 December 2013
ER -