Highly- Intergrated 3-D MMIC Technology Being Applied to Novel Masterslice GaAs-and Si-MMIC's

Tsuneo Tokumitsu, Makoto Hirano, Kimiyoshi Yamasaki, Chikara Yamaguchi, Kenjiro Nishikawa, Masayoshi Aikawa

研究成果: Article › 査読

本文言語	English
ジャーナル	IEEE Journal of Solid-State Circuits
巻	32
出版ステータス	Published - 1997 4月 1

引用スタイル

@article{69b397f6f10f4d2e988ae62f10f21410,

title = "Highly- Intergrated 3-D MMIC Technology Being Applied to Novel Masterslice GaAs-and Si-MMIC's",

author = "Tsuneo Tokumitsu and Makoto Hirano and Kimiyoshi Yamasaki and Chikara Yamaguchi and Kenjiro Nishikawa and Masayoshi Aikawa",

year = "1997",

month = apr,

day = "1",

language = "English",

volume = "32",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - Highly- Intergrated 3-D MMIC Technology Being Applied to Novel Masterslice GaAs-and Si-MMIC's

AU - Tokumitsu, Tsuneo

AU - Hirano, Makoto

AU - Yamasaki, Kimiyoshi

AU - Yamaguchi, Chikara

AU - Nishikawa, Kenjiro

AU - Aikawa, Masayoshi

PY - 1997/4/1

Y1 - 1997/4/1

M3 - Article

SN - 0018-9200

VL - 32

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

ER -