TY - JOUR
T1 - Linearity performance comparison of cascode current source and single-device current source IDPs; analyses, simulations and measurements
AU - Hadidi, Khayrollah
AU - Morimoto, Makoto
AU - Futami, Keita
AU - Oue, Takeshi
AU - Ito, Mitsuyoshi
AU - Sasaki, Masahiro
AU - Khoei, Abdollah
AU - Matsumoto, Takashi
PY - 2003/5
Y1 - 2003/5
N2 - The input differential pair (IDP) is usually a major source of nonlinear distortion in any op-amp. This is especially true if the input signal has a large common-mode component, as is the case when an op-amp functions as a unity-gain buffer or as part of a single-ended sample-hold (S/H) circuit. In this paper, we analyse the distortion of the commonly used cascode current source IDP structure and explain the sources of its nonlinear behaviour. Next, a special design technique is proposed which enhances the linearity of IDPs. The circuit uses a single device current source that has the same channel length while its width is double those of IDP devices. Theoretical analysis, as well as simulation and experimental results, is given to confirm the improved linearity of a unity gain buffer. Simulations predict improvements up to 20 dB. 15 dB total harmonic distortion (THD) reduction was also achieved for a 15 MHz input signal based on measurement of a test chip. The method is valuable as power supply voltages shrink, and the design offers extra voltage headroom at input.
AB - The input differential pair (IDP) is usually a major source of nonlinear distortion in any op-amp. This is especially true if the input signal has a large common-mode component, as is the case when an op-amp functions as a unity-gain buffer or as part of a single-ended sample-hold (S/H) circuit. In this paper, we analyse the distortion of the commonly used cascode current source IDP structure and explain the sources of its nonlinear behaviour. Next, a special design technique is proposed which enhances the linearity of IDPs. The circuit uses a single device current source that has the same channel length while its width is double those of IDP devices. Theoretical analysis, as well as simulation and experimental results, is given to confirm the improved linearity of a unity gain buffer. Simulations predict improvements up to 20 dB. 15 dB total harmonic distortion (THD) reduction was also achieved for a 15 MHz input signal based on measurement of a test chip. The method is valuable as power supply voltages shrink, and the design offers extra voltage headroom at input.
UR - http://www.scopus.com/inward/record.url?scp=0242365736&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0242365736&partnerID=8YFLogxK
U2 - 10.1080/00207210310001610538
DO - 10.1080/00207210310001610538
M3 - Article
AN - SCOPUS:0242365736
SN - 0020-7217
VL - 90
SP - 341
EP - 353
JO - International Journal of Electronics
JF - International Journal of Electronics
IS - 5
ER -