抄録
Numerical analysis of GaAs MESFETs with a p-buffer layer on the semi-insulating substrate is presented in which impurity compensation by traps is included. Using a p-buffer layer is shown to be effective in minimising the short-channel effects as in the case of using a substrate with high density of traps.
| 本文言語 | English |
|---|---|
| ページ（範囲） | 86-88 |
| ページ数 | 3 |
| ジャーナル | Electronics Letters |
| 巻 | 25 |
| 号 | 2 |
| DOI | |
| 出版ステータス | Published - 1989 9月 1 |
ASJC Scopus subject areas
- 電子工学および電気工学