Transient simulations of GaN MESFETs are performed in which a three-level, compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a deep acceptor are considered. Quasi-pulsed I-V curves are derived from the transient characteristics, and are compared with steady-state I-V curves. It is shown that so-called current compression is more pronounced when the deep-acceptor density in the buffer layer is higher and when an off-state drain voltage is higher, because trapping effects become more significant. It is suggested that to minimize current compression in GaN-based FETs, an acceptor density in a semi-insulating GaN layer should be made low.
|出版ステータス||Published - 2006 12月 8|
|イベント||2006 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings - Boston, MA, United States|
継続期間: 2006 5月 7 → 2006 5月 11
|Conference||2006 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings|
|Period||06/5/7 → 06/5/11|
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