On-board snubber circuit for damping of anti-resonance peak in total PDN

Toma Yamaguchi, Kanae Kurita, Toshio Sudo

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

Power supply noise is a serious issue for advanced CMOS LSIs and systems, since the performance of LSI chip is becoming more sensitive to power supply fluctuation under the lower power supply voltage. Because power supply noises are strongly related to the anti-resonance peak frequency in the total power distribution network (PDN), suppressing the anti-resonance peak is one of the most important design concerns. In this paper, the on-board snubber circuits (RC series circuits) has been studied to suppress the anti-resonance peak. The optimal circuit parameters of the on-board snubber circuits such as capacitance (Csnb) and resistance (Rdmp) were derived for quad flat package (QFP) and ball grid array (BGA) to effectively suppress the anti-resonance peak of the total PDN impedance. As a result, the settling time of power supply noises were greatly decreased. Furthermore, clock frequency dependency of power supply noise was also significantly decreased.

本文言語English
ホスト出版物のタイトルIEEE CPMT Symposium Japan 2014 - The Leading International Components, Packaging, and Manufacturing Technology Symposium
ホスト出版物のサブタイトル"Packaging for Future Optoelectronics, RF/High-Speed Electronics and Bioelectronics", ICSJ 2014
出版社Institute of Electrical and Electronics Engineers Inc.
ページ91-94
ページ数4
ISBN(電子版)9781479961955
DOI
出版ステータスPublished - 2014 1月 13
イベント2014 4th IEEE CPMT Symposium Japan, ICSJ 2014 - Kyoto, Japan
継続期間: 2014 11月 42014 11月 6

出版物シリーズ

名前IEEE CPMT Symposium Japan 2014 - The Leading International Components, Packaging, and Manufacturing Technology Symposium: "Packaging for Future Optoelectronics, RF/High-Speed Electronics and Bioelectronics", ICSJ 2014

Conference

Conference2014 4th IEEE CPMT Symposium Japan, ICSJ 2014
国/地域Japan
CityKyoto
Period14/11/414/11/6

ASJC Scopus subject areas

  • 電子工学および電気工学

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