抄録
At 13.56MHz, the inverter is strongly affected by parasitic elements. The print circuit board (PCB) design is very critical because it control the parasitic elements on the circuit. This paper analyzes the effect of parasitic elements on switching performance of MOSFETs in 13.56MHz class D inverter. This work also proposes an improved PCB design which can provide a 23.4% decrease in parasitic inductance comparing with conventional PCB design.
本文言語 | English |
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ホスト出版物のタイトル | 9th International Conference on Power Electronics - ECCE Asia: "Green World with Power Electronics", ICPE 2015-ECCE Asia |
出版社 | Institute of Electrical and Electronics Engineers Inc. |
ページ | 1692-1699 |
ページ数 | 8 |
ISBN(印刷版) | 9788957082546 |
DOI | |
出版ステータス | Published - 2015 7月 27 |
イベント | 9th International Conference on Power Electronics - ECCE Asia, ICPE 2015-ECCE Asia - Seoul, Korea, Republic of 継続期間: 2015 6月 1 → 2015 6月 5 |
Other
Other | 9th International Conference on Power Electronics - ECCE Asia, ICPE 2015-ECCE Asia |
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国/地域 | Korea, Republic of |
City | Seoul |
Period | 15/6/1 → 15/6/5 |
ASJC Scopus subject areas
- エネルギー工学および電力技術
- 電子工学および電気工学