TY - JOUR
T1 - Power Optimization Methodology for Ultralow Power Microcontroller with Silicon on Thin BOX MOSFET
AU - Okuhara, Hayate
AU - Fujita, Yu
AU - Usami, Kimiyoshi
AU - Amano, Hideharu
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2017/4
Y1 - 2017/4
N2 - In this brief, a practical power optimization method that calculates the optimal power supply and body bias voltages, for a given target operational frequency and a temperature, is proposed and evaluated. The proposed optimization method is based upon a simple power model in which several coefficients for leakage power, switching power, temperature, and operational frequency are obtained from accurate real chip measurements. The calculated optimal-voltage settings by the proposed model can achieve minimum accuracies of 93.8%, 91.6%, and 79.5% for room-temperature, 50 °C, and 65 °C, respectively. Since the proposed methodology is based on well-known power formulas, it can be applied to the latest FD-SOI technologies.
AB - In this brief, a practical power optimization method that calculates the optimal power supply and body bias voltages, for a given target operational frequency and a temperature, is proposed and evaluated. The proposed optimization method is based upon a simple power model in which several coefficients for leakage power, switching power, temperature, and operational frequency are obtained from accurate real chip measurements. The calculated optimal-voltage settings by the proposed model can achieve minimum accuracies of 93.8%, 91.6%, and 79.5% for room-temperature, 50 °C, and 65 °C, respectively. Since the proposed methodology is based on well-known power formulas, it can be applied to the latest FD-SOI technologies.
KW - Body bias control
KW - FD-SOI
KW - Silicon on thin BOX (SOTB)
KW - power optimization
KW - ultralow power design
UR - http://www.scopus.com/inward/record.url?scp=85008430484&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85008430484&partnerID=8YFLogxK
U2 - 10.1109/TVLSI.2016.2635675
DO - 10.1109/TVLSI.2016.2635675
M3 - Article
AN - SCOPUS:85008430484
SN - 1063-8210
VL - 25
SP - 1578
EP - 1582
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 4
M1 - 7802624
ER -