抄録
A technique to improve the power efficiency of switched capacitor DC-DC converters, which reuses the charge of parasitic capacitance in the circuit, has been reported. In this research, the charge recycling method is applied to the DC-DC converter derived from continued fraction expansion and the conversion efficiency is discussed. Simulation was performed using 0.18 µm CMOS process parameters for verification. Adiabatic operation of the proposed circuit can be confirmed from simulation results.
| 寄稿の翻訳タイトル | Charge recycling technique for arbitrary rational conversion ratio switched capactor DC-DC converter |
|---|---|
| 本文言語 | Japanese |
| ページ（範囲） | 36-42 |
| ページ数 | 7 |
| ジャーナル | IEEJ Transactions on Electronics, Information and Systems |
| 巻 | 139 |
| 号 | 1 |
| DOI | |
| 出版ステータス | Published - 2019 |
Keywords
- Adiabatic circuit
- Charge recycling
- DC-DC converter
- Parasitic capacitance
- Power efficiency
- Switched capacitor
ASJC Scopus subject areas
- 電子工学および電気工学